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RFIC Design Engineer (RFIC Engineering)

NewBe an early applicant North AmericaFull-time

Designs, simulates, and models RF/analog/mixed-signal integrated circuits for SpaceX's Starlink satellite internet system, working with cross-disciplinary teams in SiGe or CMOS processes to develop next-generation RFICs for space and ground infrastructure.

Cmos Firmware Itar

125K – 195K $

Software Engineer, Hardware Test & Automation (Starlink)

NewBe an early applicant North AmericaFull-time

Designs and builds test and automation software for Starlink satellite hardware, working with flight components, test equipment, and manufacturing systems. Uses Python and C/C++ to create hardware-in-the-loop simulations, analyze test data, and support continuous integration and release tooling.

Acceptance Criteria Agile API Automation Can Bus +16 skills

125K – 175K $

Software Engineer, Hardware Test & Automation (Starshield)

NewBe an early applicant North AmericaInternshipIntern

Develops test and automation software in Python and C/C++ for SpaceX's Starshield satellite hardware, building HITL testbeds, production-floor tools, and CI infrastructure to verify flight systems.

Acceptance Criteria Agile Automation Can Bus CI/CD +14 skills

125K – 175K $

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for SpaceX's Starlink satellite internet system, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting silicon bring-up with cross-disciplinary teams.

Firmware Itar Python Rtl Verilog

175K – 280K $

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for SpaceX's Starlink network, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting timing-clean synthesis and silicon bring-up.

Firmware Itar Python Rtl Verilog

165K – 265K $

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

SpaceX seeks a senior RTL design engineer to develop next-generation ASICs for the Starlink satellite constellation, working on architectural trade-offs, Verilog/SystemVerilog implementation, verification, timing closure, and silicon bring-up for space and ground infrastructure.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for Starlink's space and ground infrastructure, defining micro-architecture, writing RTL in Verilog/SystemVerilog, and supporting synthesis, timing closure, and silicon bring-up with cross-functional teams.

Firmware Itar Python Rtl Verilog

165K – 270K $

Sr. ASIC Design Engineer (Starshield)

NewBe an early applicant North AmericaFull-timeSenior

Designs digital ASICs and FPGAs for SpaceX's Starshield national-security programs, writing RTL in Verilog/SystemVerilog and taking designs through verification, synthesis/timing closure, and silicon bring-up for space and ground infrastructure.

Asic FPGA Itar Python Tcl +2 skills

160K – 225K $

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for Starlink's space and ground infrastructure. Day-to-day work includes block- and system-level digital ASIC verification, test plan development, regression execution, coverage closure, and chip bring-up/validation using UVM and Python.

Asic Automation Firmware Itar OOP +3 skills

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Verifies digital ASICs at block and system level for SpaceX's Starlink satellites and ground infrastructure, writing test plans, running regressions, and supporting chip bring-up and post-silicon validation using UVM/OVM/VMM and Python.

Asic Automation Firmware Itar OOP +3 skills

165K – 260K $

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Verifies digital ASICs at block and system level for SpaceX's Starlink satellites and ground infrastructure. Writes test plans, builds testbenches, runs regressions, closes coverage, and supports chip bring-up and post-silicon validation using UVM/OVM/VMM, Python, and RTL design.

Asic Automation Firmware Itar OOP +3 skills

175K – 280K $

Sr. Electrical Design Engineer, Gateways & Customer Hardware (Starlink)

NewBe an early applicant North AmericaFull-timeSenior

Designs, develops, and tests electronics for Starlink gateways and customer hardware, owning products from concept through production. Works cross-functionally with software, mechanical, RF, and manufacturing teams on schematic capture, PCB layout, bring-up, and debugging using mixed-signal boards, FPGAs, and high-speed interfaces.

C++ Ethernet I2c Itar Networking +3 skills

Sr. Electrical Engineer, Hardware Reliability (Starlink)

NewBe an early applicant HybridNorth AmericaFull-timeSenior

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Assembly Automation Corrective Action C++ Firmware +7 skills

Sr. Electrical Hardware Engineer, AI Satellites (Starmind)

NewBe an early applicant North AmericaFull-timeSenior

Designs and builds high-reliability electrical hardware for SpaceX's Starmind AI satellite constellation, owning PCB design through on-orbit performance. Works with power electronics, high-speed digital, mixed-signal, and custom compute electronics for orbital AI data centers.

AI C++ Ethernet I2c Itar +4 skills

Sr. Electrical Test Development Engineer, Customer Hardware (Starlink)

NewBe an early applicant North AmericaInternshipSenior

Designs and develops automated test solutions for Starlink customer hardware such as user terminals, Wi-Fi routers, and power supplies; writes Python automation and collaborates with cross-functional teams to verify reliability and performance from concept to production.

Automation C++ Itar Oscilloscope Python +1 skills

Sr. Hardware Design Engineer - Electrical, Satellites Payload (Starlink)

NewBe an early applicant North AmericaFull-timeSenior

Designs and brings up high-reliability satellite payload electronics for Starlink, owning hardware from concept through production and on-orbit performance. Works with mixed-signal boards, RF, power, and FPGA/ASIC interfaces alongside cross-functional teams.

C++ Ethernet I2c Itar Networking +3 skills

150K – 245K $

Sr. Hardware Development Electrical Engineer - (Starlink)

NewBe an early applicant North AmericaFull-timeSenior

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Backbone.js C++ Ethernet I2c Itar +3 skills

Sr. Hardware Development Engineer, Gateway Failure Analysis (Starlink)

NewBe an early applicant North AmericaFull-timeSenior

Designs, builds, and tests electronics for Starlink ground station antennas, performs failure analysis on ground antenna hardware, and develops test solutions using RF and environmental test equipment. Collaborates with mechanical, thermal, software, and antenna teams to ensure hardware reliability in harsh environments. Core technologies include PCBAs, Python/C/C++, oscilloscopes, spectrum analyz

Corrective Action C++ Itar Oscilloscope Python +2 skills

Sr. Hardware Development Engineer, Gateways & Customer Hardware (Starlink)

NewBe an early applicant North AmericaFull-timeSenior

Designs, develops, and tests electronics for Starlink gateways and customer hardware, taking products from concept through production while collaborating with software, mechanical, RF, and manufacturing teams. Core technologies include mixed-signal boards, FPGAs, processors, DDR4, and Python/C/C++.

C++ Ethernet I2c Itar Networking +3 skills

Sr. Hardware Reliability Engineer (Build Reliability)

NewBe an early applicant North AmericaFull-timeSenior

A Sr. Hardware Reliability Engineer at SpaceX partners with design, test, and manufacturing teams to ensure the reliability of avionics and electromechanical hardware from design through production and flight, using quality tools and root-cause analysis to drive improvements in manufacturing and test processes.

Corrective Action Itar Root Cause Analysis

165K – 230K $