Crusoe is on a mission to accelerate the abundance of energy and intelligence . As the only vertically integrated AI infrastructure company built from the ground up, we own and operate each layer of the stack — from…
Verifies NVIDIA's inference accelerator (LPU) ASIC design and implementation, building testbenches and verification infrastructure using SystemVerilog and UVM, and collaborating with architects and design teams to ensure pre- and post-silicon correctness.
Senior ASIC Design Engineer at NVIDIA designing GPU/SoC RTL, performing logic synthesis and timing analysis, integrating modules into SOC, and improving design flows using Perl/Python/C++ scripting.
NVIDIA seeks a Senior ASIC Verification Infrastructure Engineer to build CI, simulation, and pre-submit qualification flows for large ASIC/IP development. The role combines Verilog/SystemVerilog and UVM verification with Python/Perl scripting, root-cause analysis, and automation/metrics across distributed systems, including AI workflows to raise engineering efficiency.
Designs printed circuit boards for diverse customers, collaborating daily with engineering teams via web-based tools and tracking project progress. Requires expert PCB layout using Siemens Xpedition, Cadence Allegro, or Altium, plus IPC standards knowledge and RF/mixed-signal experience.
NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More…
Develops FPGA/SoC firmware for Anduril’s space systems, handling RTL generation, debug, synthesis, place-and-route, timing closure, and board bring-up while coordinating with internal and external design teams. Core technologies include Xilinx SoC/FPGA (Versal), VHDL/Verilog, Vivado, and high-speed interfaces.
Verifies and validates hardware for autonomous aircraft across the product lifecycle, running environmental qualification, production acceptance, and ground/flight testing to ensure systems meet requirements. Works with MIL-STD standards, requirements traceability, and tools like Jama, DOORS, and Polarion.
Senior Commodity Manager at Anduril Industries owns end-to-end supplier relationships for imaging hardware, including infrared optics and electro-optical sensor systems. The role involves sourcing, negotiation, cost modeling, capacity planning, and supply-chain compliance for defense products.
Designs and integrates RTL for FPGA and SoC-based avionics and embedded systems, running the full hardware development cycle from architecture and microarchitecture through simulation, synthesis, timing closure, lab bring-up, and system integration, using VHDL/Verilog/SystemVerilog and FPGA toolchains.
Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st…
Senior FPGA Engineer owning end-to-end FPGA development and verification for software-defined radio platforms that enable electronic-warfare functions. Works with AMD/Xilinx SoC/FPGAs, VHDL/Verilog DSP, and high-speed interfaces, collaborating with hardware and software teams to bring up boards in Costa Mesa, CA.
Senior FPGA Engineer at Anduril Industries designs, tests, and implements FPGA systems on Xilinx SoC platforms using VHDL/Verilog, working through the full design lifecycle with hands-on board bring-up in Reston, Virginia.
The engineer designs and runs verification environments for FPGA/ASIC RTL blocks using SystemVerilog, VHDL, and UVM/OVM, creates test plans and coverage tracking, and provides technical leadership on Anduril's Imaging team hardware products.
Designs and runs FPGA/ASIC verification environments and testbenches for RTL blocks using SystemVerilog, VHDL/Verilog and UVM/OVM, tracks coverage, and leads verification for Anduril's defense imaging systems.
Senior FPGA Verification Engineer in Costa Mesa, CA who owns verification of AMD (Xilinx) FPGA/SoC designs for flight-critical avionics, building UVM-based coverage-driven testbenches, SystemVerilog assertions, and regression suites while collaborating on RTL and supporting board bring-up.
Senior Hardware Engineer on Anduril's Thunder team, owning full-cycle PCB design and avionics systems for an autonomous attack rotorcraft, including schematic design, component selection, bring-up, test, debug, and integration with flight controls, sensors, payloads, and networking.
Leads an electrical engineering team that creates embedded compute solutions for vehicle management, DSP, and networking, owning the full PCB development cycle for FPGA/SoC/SoM host boards and FPGA/HDL design workflows using VHDL/Verilog and Altium Designer.
Manages warehouse and material operations for a defense technology company, leading a team to optimize inventory flow, track KPIs, and run ERP/WMS systems while ensuring safety, quality, and government-property compliance and reducing cost.
Senior Mechanical Design Engineer at Anduril Industries who owns end-to-end mechanical hardware design—from concept through prototyping and volume manufacturing—for autonomous air, sea, ground, and strike platforms. Works with CAD (SolidWorks, NX, Creo), ASME Y14.5 GD&T, FEA, and fabrication processes like CNC machining and composites.
Cookies?
A session cookie keeps you signed in. If you accept, we also use analytics cookies (Google Analytics and PostHog) to understand usage. Learn more
We couldn't check your fit for this role — add a CV to your profile to see it next time.