Designs, builds, and maintains custom internal tools, backend services, and APIs that extend Anduril's Oracle Fusion Cloud ERP for Finance, Supply Chain, and Manufacturing. Works with Oracle Integration Cloud, enterprise data platforms, REST APIs, SQL, and cloud tech using Python, Java, JavaScript, and TypeScript in a defense-technology environment.
Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st…
An early-career SDET intern based in Dublin who writes code to test code, building UI/API/integration test automation frameworks, CI/CD pipelines, and test tooling using Python, Linux, and GitLab/GitHub while supporting mission-critical defense systems.
Leads MDAO for air vehicles and missiles, integrating disciplinary models, automating workflows with commercial MDAO frameworks, and applying AI to accelerate design. Uses Python/MATLAB, CAD scripting, DOE, optimization, and uncertainty quantification for collaborative combat aircraft programs.
Owns data workstreams end-to-end for Anduril's Hardware Test team, building Palantir Foundry pipelines, data models, and dashboards from telemetry and test data. Writes small Python or Go services, partners with test and infrastructure teams, and produces design docs and RFCs for production data products.
Builds and maintains test and release infrastructure for radar software, writing automated tests (Python/C++), running CI/CD pipelines, and operating hardware-in-the-loop test rigs to keep radar releases repeatable, traceable, and auditable on Linux.
FPGA Design Engineer for Anduril's Air Dominance and Strike team, designing RTL in VHDL/Verilog/SystemVerilog for avionics and mission-critical embedded systems, owning designs from architecture through timing closure and hardware integration.
Embedded Software Engineer developing test automation software for defense hardware (land, sea, air) using Python, C#/WPF, and cloud services; requires U.S. Secret clearance eligibility.
Lead FPGA architecture, design, and verification for airborne radar systems, translating signal processing algorithms into RTL (SystemVerilog/VHDL) on Altera platforms while establishing design processes and mentoring engineers.
FPGA Engineer responsible for end-to-end design and verification of FPGA-based software defined radio platforms for electronic warfare, using AMD/Xilinx SOC/FPGA devices, VHDL/Verilog HDL, Linux, and CI/CD in Costa Mesa, CA.
FPGA Verification Engineer for flight-critical avionics on AMD/Xilinx platforms, using UVM/SystemVerilog for coverage-driven verification, DO-254 compliance, and hardware validation.
Full Stack Software Engineer at Anduril Labs in Washington, DC, building prototypes for advanced defense technologies (autonomous systems, GenAI, quantum, cybersecurity) using Python, C++, React, cloud, AI/ML frameworks, and containerization; owns full SDLC, collaborates across teams, and participates in field experiments.
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