SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
Designs, builds, and operates SpaceX's Starshield data center network supporting AI clusters at 100k+ GPU scale, handling Layer-1 optical connectivity, datacenter routing/switching, and network automation for national security missions.
Operates, builds, and deploys SpaceX's Starshield data center network supporting national security missions, designing high-speed optical/copper connectivity for large-scale AI clusters and collaborating with ML teams on interconnect topology. Core technologies: data center networking (BGP, OSPF, VXLAN, MPLS), InfiniBand/NVLink, NVIDIA GPU stacks, and network automation.
Sr. Network Engineer for SpaceX Starshield, operating and deploying the service provider network supporting national security missions. Day-to-day includes network design, security, performance, reliability, datacenter deployments, and automation for switches, routers, firewalls, and Layer-1 transport.
Senior PCB Designer on SpaceX's Starship team responsible for multilayer PCB layout, component placement, high-speed routing, SI/PI simulations, and fabrication deliverables, collaborating with hardware engineers and using tools like Altium and Xpedition.
Sr. RFIC Design Engineer designing cutting-edge RF/analog/mixed-signal ICs for Starlink satellite and ground systems, using SiGe/CMOS processes and microwave frequencies (Ku/K/Ka-band).
Sr. RFIC Design Engineer at SpaceX designing next-gen RFICs for Starlink satellite internet, working on SiGe/CMOS circuits at microwave frequencies (Ku/K/Ka-band), simulating with Spectre/ADS/HFSS, and collaborating across systems, firmware, and validation teams.
Designs, simulates, and models RF/analog/mixed-signal integrated circuits for SpaceX's Starlink satellite and ground systems, working with cross-disciplinary teams on next-generation RFICs using SiGe or CMOS processes.
Sr. RFIC Layout Designer at SpaceX working on Starlink satellite internet system, responsible for custom analog/RFIC layout, chip floor planning, DRC/ERC/LVS, and tape-out using advanced process nodes (22nm-5nm) up to 50GHz.
Senior RFIC Layout Designer at SpaceX working on Starlink satellite internet system. Leads custom analog/RF IC layout for advanced nodes (22nm–5nm) up to 50GHz, including floor planning, DRC/ERC/LVS, tape-out, and scripting automation using Skill/Python.
Senior RFIC Layout Designer at SpaceX working on Starlink satellite internet system. Leads custom analog/RF IC layout for advanced nodes (22nm–5nm) up to 50GHz, including floorplanning, DRC/ERC/LVS, tape-out, and scripting automation with Cadence/Skill and Python.
Senior RFIC Layout Designer leading full-chip layout of custom analog and RFIC designs for SpaceX's Starshield national security satellites, including floor planning, DRC/ERC/LVS, tape-out, and advanced node (16nm/7nm/5nm) layouts up to 50GHz.
Develops next-generation Starlink silicon, handling physical implementation from synthesis through signoff (floorplanning, place and route, timing, power/ground grid, physical verification) and improving design flows with automation scripts, working with ASIC teams on timing, power, and area targets. Core technologies: ASIC/SOC RTL2GDSII, EDA tools, STA, Python/TCL/Perl scripting.
Designs and implements next-generation ASIC/SOC silicon for SpaceX's Starlink satellite and ground infrastructure. Day-to-day work includes physical implementation (synthesis, floorplanning, place-and-route, timing, signoff), flow automation, and collaboration with architecture and design teams.
Designs and implements next-generation silicon chips for SpaceX's Starlink network, managing physical design flows from synthesis through signoff using EDA tools and scripting. Collaborates with cross-disciplinary teams on timing, power, area, and physical verification for space and ground infrastructure.
Designs and develops test, factory automation, driver, and firmware software for spacecraft components at SpaceX. The role involves writing Python and C automation to interface with flight hardware and test equipment, analyzing test data, and supporting manufacturing of Starship, Dragon, Falcon, and Raptor components.
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