Designs and brings up custom RF silicon for Starlink satellites, ground gateways, and user terminals by writing low-level C/C++/Python driver libraries, building hardware test platforms, and validating silicon software on physical hardware or FPGA emulators.
RF Software Engineer for Starlink at SpaceX in Bastrop, TX. Designs and builds RF capabilities and test automation for low-earth-orbit satellite communications using Python and C++, collaborating with hardware, DSP, and software teams.
Designs and builds RF capabilities for SpaceX's Starshield satellite communications and remote sensing systems, collaborating with cross-functional teams to create and automate RF test infrastructure using Python and C++.
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
Designs digital ASICs and FPGAs for SpaceX's Starshield national-security programs, writing RTL in Verilog/SystemVerilog and taking designs through verification, synthesis/timing closure, and silicon bring-up for space and ground infrastructure.
Designs and validates next-generation ASICs for Starlink's satellite broadband and RF sensing systems. Day-to-day work includes DSP algorithm modeling, digital beamforming and massive MIMO research, link-budget analysis, and collaboration with ASIC/FPGA and RF teams using MATLAB, C/C++, and Python.
Designs and tests next-generation ASICs for Starlink satellite broadband systems, focusing on DSP, digital beamforming, and massive MIMO. Collaborates with cross-functional teams to model RF/wireless modems, generate silicon specifications, and support hardware bring-up and validation.
The Sr. PCB Designer creates PCB layouts for SpaceX's in-house Starshield board designs, partnering with hardware engineers on stackup, placement, routing, libraries, and fabrication documentation using ECAD tools such as Mentor Xpedition and Altium Designer.
A Sr. PCB Designer at SpaceX creates PCB layouts (2–20+ layers) for Starlink hardware such as radio phased arrays and power converters, partnering with hardware engineers on placement, routing, signal/power integrity, and fabrication documentation.
Senior PCB Designer on SpaceX's Starship team responsible for multilayer PCB layout, component placement, high-speed routing, SI/PI simulations, and fabrication deliverables, collaborating with hardware engineers and using tools like Altium and Xpedition.
Sr. RF Silicon Software Engineer at SpaceX bringing up custom RF silicon for Starlink satellites and user terminals, writing low-level C/C++/Python drivers, building hardware-in-the-loop test platforms, and integrating with flight software teams.
Senior RF software engineer designing and automating RF test infrastructure for Starlink's satellite constellation using Python/C++, lab equipment (VNA, VSG, VSA), and electromagnetic simulation. Collaborates across hardware, FPGA, DSP, and software teams to validate RF systems for low Earth orbit communications.
Senior RF software engineer developing automated test infrastructure for satellite RF systems (Starshield) using Python/C++ and lab equipment (VNA, VSG, VSA), collaborating across hardware/FPGA/DSP teams to validate designs for national security missions.
The engineer develops core software for SpaceX's metal 3D printing machines, spanning controls, data acquisition, build logic, infrastructure, and in-situ monitoring to improve printed rocket engine hardware. Core technologies include C++, Linux, CI/CD, with QT, VTK, Boost, CUDA, CMake and embedded/real-time experience preferred.
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