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168 jobs

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168 jobs Posted Sort

Solutions Architect, FPGA

NewBe an early applicant RemoteNorth America

The Solutions Architect, FPGA consults with clients to assess project fit, architects FPGA-based solutions, builds estimates and risk plans, and writes proposal content. Core technologies include RTL design in VHDL/SystemVerilog, AMD and Altera FPGAs, high-speed interfaces (PCIe, Ethernet, DDR, JESD204, AXI), and verification (SystemVerilog/UVM).

AI Automation Embedded Software Ethernet FPGA +7 skills

Senior ASIC Design Engineer

NewBe an early applicant RemoteNorth AmericaSenior

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market,…

AI Asic C++ Deep Learning Perl +2 skills

Anduril Industries

FPGA Engineer

NewBe an early applicant North AmericaFull-timeLead

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st…

AI CI/CD Computer Vision Embedded Software Ethernet +12 skills

Principal Modem SOC Design Engineer - Terawave

NewBe an early applicant RemoteNorth AmericaFull-timePrincipal

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re…

Ethernet FPGA Prototyping Rtl Signal Processing +1 skills

Anduril Industries

FPGA Engineer

NewBe an early applicant North AmericaFull-timeLead

Lead FPGA architecture, design, and verification for airborne radar systems, translating signal processing algorithms into RTL (SystemVerilog/VHDL) on Altera platforms while establishing design processes and mentoring engineers.

AI CI/CD Computer Vision Embedded Software Ethernet +12 skills

143K – 191K $

Senior Modem SOC Design Engineer - TeraWave

NewBe an early applicant RemoteNorth AmericaFull-timeSenior

Senior Modem SOC Design Engineer at Blue Origin, designing digital hardware for the TeraWave satellite communications SOC, owning RTL design for modem datapath/PHY blocks, signal processing hardware, Arm compute subsystem, and IO infrastructure, partnering across architecture, verification, and physical design teams to deliver production silicon.

Ethernet Rtl Signal Processing Verilog

ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Bash C++ Firmware FPGA +7 skills

Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Automation Firmware Itar MATLAB +5 skills

Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Automation Firmware Itar MATLAB +5 skills

Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Automation Firmware Itar MATLAB +5 skills

FPGA/ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Bash C++ Firmware FPGA +7 skills

FPGA/ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Asic Bash C++ Firmware FPGA +7 skills

FPGA Engineer (Starshield)

NewBe an early applicant North AmericaFull-time

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Bash C++ Cryptography Embedded Systems Ethernet +11 skills

Principal Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

Leads digital ASIC/FPGA design verification for Starlink chips, owning test plans from start to finish and supporting pre-silicon verification through post-silicon validation, using UVM/OVM/VMM methodologies and Python scripting.

Automation Firmware FPGA Itar OOP +3 skills

210K – 355K $

Principal Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

Leads digital ASIC and FPGA verification for SpaceX’s next-generation Starlink chips, owning test plans from development through pre-silicon verification, chip bring-up, and post-silicon validation using UVM/OVM/VMM, constrained random verification, and Python scripting.

Automation Firmware FPGA Itar OOP +3 skills

210K – 335K $

Principal Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

Principal Design Verification Engineer for SpaceX's Starlink silicon team, leading digital ASIC/FPGA verification at block and system level, developing test plans, coverage models, and performing pre-silicon verification, chip bring-up, and post-silicon validation using UVM, constrained random verification, Python, and RTL design.

Automation Firmware FPGA Itar OOP +3 skills

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for SpaceX's Starlink satellite internet system, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting silicon bring-up with cross-disciplinary teams.

Firmware Itar Python Rtl Verilog

175K – 280K $

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for SpaceX's Starlink network, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting timing-clean synthesis and silicon bring-up.

Firmware Itar Python Rtl Verilog

165K – 265K $

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

SpaceX seeks a senior RTL design engineer to develop next-generation ASICs for the Starlink satellite constellation, working on architectural trade-offs, Verilog/SystemVerilog implementation, verification, timing closure, and silicon bring-up for space and ground infrastructure.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

Designs and verifies next-generation ASICs for Starlink's space and ground infrastructure, defining micro-architecture, writing RTL in Verilog/SystemVerilog, and supporting synthesis, timing closure, and silicon bring-up with cross-functional teams.

Firmware Itar Python Rtl Verilog

165K – 270K $