The Solutions Architect, FPGA consults with clients to assess project fit, architects FPGA-based solutions, builds estimates and risk plans, and writes proposal content. Core technologies include RTL design in VHDL/SystemVerilog, AMD and Altera FPGAs, high-speed interfaces (PCIe, Ethernet, DDR, JESD204, AXI), and verification (SystemVerilog/UVM).
Verifies NVIDIA's inference accelerator (LPU) ASIC design and implementation, building testbenches and verification infrastructure using SystemVerilog and UVM, and collaborating with architects and design teams to ensure pre- and post-silicon correctness.
Bright Vision Technologies is a technology consulting and software development company delivering cloud, AI, data, and enterprise solutions across the United States. This is a fantastic opportunity to join an…
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping…
Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st…
Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re…
FPGA Design Engineer for Anduril's Air Dominance and Strike team, designing RTL in VHDL/Verilog/SystemVerilog for avionics and mission-critical embedded systems, owning designs from architecture through timing closure and hardware integration.
Lead FPGA architecture, design, and verification for airborne radar systems, translating signal processing algorithms into RTL (SystemVerilog/VHDL) on Altera platforms while establishing design processes and mentoring engineers.
FPGA Verification Engineer for flight-critical avionics on AMD/Xilinx platforms, using UVM/SystemVerilog for coverage-driven verification, DO-254 compliance, and hardware validation.
Designs and integrates RTL for FPGA and SoC-based avionics and embedded systems, running the full hardware development cycle from architecture and microarchitecture through simulation, synthesis, timing closure, lab bring-up, and system integration, using VHDL/Verilog/SystemVerilog and FPGA toolchains.
Senior Embedded Engineer on Anduril's Imaging team leads FPGA architecture and RTL design (VHDL/Verilog) for new defense imaging product lines, handling hardware/software integration, prototype bring-up, and lab validation using Xilinx Vivado and Intel Quartus.
Senior FPGA Engineer at Anduril Industries designs, tests, and implements FPGA systems on Xilinx SoC platforms using VHDL/Verilog, working through the full design lifecycle with hands-on board bring-up in Reston, Virginia.
The engineer designs and runs verification environments for FPGA/ASIC RTL blocks using SystemVerilog, VHDL, and UVM/OVM, creates test plans and coverage tracking, and provides technical leadership on Anduril's Imaging team hardware products.
Designs and runs FPGA/ASIC verification environments and testbenches for RTL blocks using SystemVerilog, VHDL/Verilog and UVM/OVM, tracks coverage, and leads verification for Anduril's defense imaging systems.
Senior FPGA Verification Engineer in Costa Mesa, CA who owns verification of AMD (Xilinx) FPGA/SoC designs for flight-critical avionics, building UVM-based coverage-driven testbenches, SystemVerilog assertions, and regression suites while collaborating on RTL and supporting board bring-up.
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
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