Tech jobs

We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in improving the netlist and timing quality of our designs…

AI Automation Perl Tcl

PMTS, PEX Engineer - Quantum

NewBe an early applicant RemoteNorth America

United States

About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology…

AI Anomaly Detection Automation Bash Cmos +6 skills

Digital Design Engineer, Air Dominance and Strike

NewBe an early applicant North AmericaFull-time

United States

FPGA Design Engineer for Anduril's Air Dominance and Strike team, designing RTL in VHDL/Verilog/SystemVerilog for avionics and mission-critical embedded systems, owning designs from architecture through timing closure and hardware integration.

AI CI/CD Computer Vision Embedded Software Embedded Systems +16 skills

FPGA Engineer, EW

NewBe an early applicant North AmericaFull-time

United States

FPGA Engineer responsible for end-to-end design and verification of FPGA-based software defined radio platforms for electronic warfare, using AMD/Xilinx SOC/FPGA devices, VHDL/Verilog HDL, Linux, and CI/CD in Costa Mesa, CA.

AI Aurora CI/CD Computer Vision FPGA +11 skills

FPGA Verification Engineer, Air Dominance and Strike

NewBe an early applicant North AmericaFull-time

United States

FPGA Verification Engineer for flight-critical avionics on AMD/Xilinx platforms, using UVM/SystemVerilog for coverage-driven verification, DO-254 compliance, and hardware validation.

AI Asic Automation CI/CD Computer Vision +13 skills

Senior Digital Design Engineer, Air Dominance and Strike

NewBe an early applicant North AmericaFull-timeSenior

United States

Designs and integrates RTL for FPGA and SoC-based avionics and embedded systems, running the full hardware development cycle from architecture and microarchitecture through simulation, synthesis, timing closure, lab bring-up, and system integration, using VHDL/Verilog/SystemVerilog and FPGA toolchains.

AI CI/CD Computer Vision Embedded Software Embedded Systems +16 skills

Senior FPGA Engineer, EW

NewBe an early applicant North AmericaFull-timeSenior

United States

Senior FPGA Engineer owning end-to-end FPGA development and verification for software-defined radio platforms that enable electronic-warfare functions. Works with AMD/Xilinx SoC/FPGAs, VHDL/Verilog DSP, and high-speed interfaces, collaborating with hardware and software teams to bring up boards in Costa Mesa, CA.

AI Aurora CI/CD Computer Vision FPGA +10 skills

Senior FPGA Verification Engineer, Air Dominance and Strike

NewBe an early applicant North AmericaFull-timeSenior

United States

Senior FPGA Verification Engineer in Costa Mesa, CA who owns verification of AMD (Xilinx) FPGA/SoC designs for flight-critical avionics, building UVM-based coverage-driven testbenches, SystemVerilog assertions, and regression suites while collaborating on RTL and supporting board bring-up.

AI Asic Automation CI/CD Computer Vision +13 skills

Staff FPGA Engineer, EW

NewBe an early applicant North AmericaFull-timeStaff

United States

Designs and verifies FPGA-based processing for software-defined radio platforms used in electronic warfare, using AMD/Xilinx SoCs, VHDL/Verilog DSP modules, and high-speed digital interfaces while mentoring a small engineering team.

AI Aurora CI/CD Computer Vision FPGA +10 skills

EDA Engineer (RFIC Engineering)

NewBe an early applicant North AmericaFull-time

United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

AI Automation Bash CAD Cadence Virtuoso +8 skills

EDA Engineer (RFIC Engineering)

NewBe an early applicant North AmericaFull-time

United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

AI Automation Bash CAD Cadence Virtuoso +8 skills

Manager, ASIC Design Engineering (Starshield Silicon)

NewBe an early applicant North AmericaFull-time

United States

Manages a team that designs, verifies, and brings up ASICs and FPGAs for SpaceX's Starshield satellite systems; day-to-day work includes RTL implementation in Verilog/SystemVerilog, architectural trades, timing constraints, EDA-tool flows, and hiring/mentoring engineers.

Asic FPGA Itar Python Tcl +2 skills

Physical Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

United States

Designs and implements next-generation ASICs for Starlink's space and ground infrastructure, performing physical implementation (synthesis, floorplanning, place and route, timing closure, signoff) and building automation scripts while collaborating with cross-disciplinary teams. Core technologies: RTL2GDSII physical design, EDA tools, STA, CMOS/FinFET, and Python/TCL/Perl scripting.

Asic Automation Bash Cmos Firmware +4 skills

Physical Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

United States

Designs and implements next-generation ASICs for Starlink satellites and ground infrastructure. Day-to-day work includes RTL-to-GDSII physical implementation (floorplanning, place-and-route, timing closure, signoff checks), flow automation, and collaboration with cross-disciplinary ASIC teams using EDA tools and scripting.

Asic Automation Bash Cmos Firmware +4 skills

Physical Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-time

United States

Physical Design Engineer developing next-generation ASICs for Starlink satellites and ground infrastructure. Performs RTL2GDSII physical implementation (synthesis, floorplanning, place and route, timing, signoff) and collaborates with cross-functional teams on timing, power, and area targets.

Asic Automation Bash Cmos Firmware +4 skills

Principal ASIC Design Engineer (Starshield)

NewBe an early applicant North AmericaFull-timePrincipal

United States

Designs digital ASICs and FPGAs for SpaceX's Starshield national-security programs, writing RTL in Verilog/System Verilog and taking designs through verification, timing closure, and silicon bring-up for space and ground infrastructure.

Asic FPGA Itar Python Tcl +2 skills

Principal DFT Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Firmware Itar Perl Python SystemVerilog +2 skills

Principal DFT Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Firmware Itar Perl Python SystemVerilog +2 skills

Principal DFT Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timePrincipal

United States

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…

Firmware Itar Perl Python SystemVerilog +2 skills

Sr. ASIC Design Engineer (Starshield)

NewBe an early applicant North AmericaFull-timeSenior

United States

Designs digital ASICs and FPGAs for SpaceX's Starshield national-security programs, writing RTL in Verilog/SystemVerilog and taking designs through verification, synthesis/timing closure, and silicon bring-up for space and ground infrastructure.

Asic FPGA Itar Python Tcl +2 skills

160K – 225K $

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Senior Circuit Design Engineer - Noise

PMTS, PEX Engineer - Quantum

Digital Design Engineer, Air Dominance and Strike

FPGA Engineer, EW

FPGA Verification Engineer, Air Dominance and Strike

Senior Digital Design Engineer, Air Dominance and Strike

Senior FPGA Engineer, EW

Senior FPGA Verification Engineer, Air Dominance and Strike

Staff FPGA Engineer, EW

EDA Engineer (RFIC Engineering)

EDA Engineer (RFIC Engineering)

Manager, ASIC Design Engineering (Starshield Silicon)

Physical Design Engineer (Silicon Engineering)

Physical Design Engineer (Silicon Engineering)

Physical Design Engineer (Silicon Engineering)

Principal ASIC Design Engineer (Starshield)

Principal DFT Engineer (Silicon Engineering)

Principal DFT Engineer (Silicon Engineering)

Principal DFT Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Starshield)

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Job listings

Senior Circuit Design Engineer - Noise

PMTS, PEX Engineer - Quantum

Digital Design Engineer, Air Dominance and Strike

FPGA Engineer, EW

FPGA Verification Engineer, Air Dominance and Strike

Senior Digital Design Engineer, Air Dominance and Strike

Senior FPGA Engineer, EW

Senior FPGA Verification Engineer, Air Dominance and Strike

Staff FPGA Engineer, EW

EDA Engineer (RFIC Engineering)

EDA Engineer (RFIC Engineering)

Manager, ASIC Design Engineering (Starshield Silicon)

Physical Design Engineer (Silicon Engineering)

Physical Design Engineer (Silicon Engineering)

Physical Design Engineer (Silicon Engineering)

Principal ASIC Design Engineer (Starshield)

Principal DFT Engineer (Silicon Engineering)

Principal DFT Engineer (Silicon Engineering)

Principal DFT Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Starshield)