Tech jobs

Designs and verifies next-generation ASICs for SpaceX's Starlink satellite internet system, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting silicon bring-up with cross-disciplinary teams.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

Designs and verifies next-generation ASICs for SpaceX's Starlink network, writing RTL in Verilog/SystemVerilog, defining micro-architecture, and supporting timing-clean synthesis and silicon bring-up.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

SpaceX seeks a senior RTL design engineer to develop next-generation ASICs for the Starlink satellite constellation, working on architectural trade-offs, Verilog/SystemVerilog implementation, verification, timing closure, and silicon bring-up for space and ground infrastructure.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

Designs and verifies next-generation ASICs for Starlink's space and ground infrastructure, defining micro-architecture, writing RTL in Verilog/SystemVerilog, and supporting synthesis, timing closure, and silicon bring-up with cross-functional teams.

Firmware Itar Python Rtl Verilog

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

Designs and verifies next-generation ASICs for Starlink's space and ground infrastructure. Day-to-day work includes block- and system-level digital ASIC verification, test plan development, regression execution, coverage closure, and chip bring-up/validation using UVM and Python.

Asic Automation Firmware Itar OOP +3 skills

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

Verifies digital ASICs at block and system level for SpaceX's Starlink satellites and ground infrastructure, writing test plans, running regressions, and supporting chip bring-up and post-silicon validation using UVM/OVM/VMM and Python.

Asic Automation Firmware Itar OOP +3 skills

Sr. ASIC Design Verification Engineer (Silicon Engineering)

NewBe an early applicant North AmericaFull-timeSenior

United States

Verifies digital ASICs at block and system level for SpaceX's Starlink satellites and ground infrastructure. Writes test plans, builds testbenches, runs regressions, closes coverage, and supports chip bring-up and post-silicon validation using UVM/OVM/VMM, Python, and RTL design.

Asic Automation Firmware Itar OOP +3 skills

Principal Technical Program Manager – DSP/Mixed-Signal ASIC Development – TeraWa

NewBe an early applicant RemoteNorth AmericaFull-timePrincipal

United States

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re…

CAD Program Management Rtl Signal Processing

Senior FPGA & Firmware Engineer - SDR

NewBe an early applicant HybridNorth AmericaSenior

United States

Join Axon and be a Force for Good. At Axon, we’re on a mission to Protect Life. We’re explorers, pursuing society’s most critical safety and justice issues with our ecosystem of devices and cloud software. Like our…

AI Ccpa Claude Code Cloud Data Pipelines +17 skills

Senior FPGA & Firmware Engineer - SDR

NewBe an early applicant HybridNorth AmericaSenior

United States

Join Axon and be a Force for Good. At Axon, we’re on a mission to Protect Life. We’re explorers, pursuing society’s most critical safety and justice issues with our ecosystem of devices and cloud software. Like our…

AI Ccpa Claude Code Cloud Data Pipelines +17 skills

Senior Logic Design Engineer

NewBe an early applicant HybridAPACSenior

India

At IBM Infrastructure & Technology, we design and operate the systems that keep the world running. From high-resiliency mainframes and hybrid cloud platforms to networking, automation, and site reliability. Our…

Agile Automation Cloud DevOps Linux +4 skills

Principal FPGA Emulation Engineer

NewBe an early applicant HybridNorth AmericaFull-timeSenior

United States

About the Role Renesas is seeking a Principal FPGA Emulation & Prototyping Engineer to build and own the FPGA-based platforms that emulate our mixed-signal power ASICs before silicon. Working shoulder to shoulder…

Agile Asic Assembly Aurora Automation +14 skills

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AC

Axis Communications AB

3 days ago

Junior ASIC Backend Engineer

NewBe an early applicant EuropeJunior

Sweden

Join our team as an ASIC Backend Engineer! Are you passionate about advanced ASIC development and eager to work at the forefront of technology? Do you thrive in a collaborative environment where your contributions…

RTL Verification Engineer

NewBe an early applicant RemoteEurope

About Us : AI compute is hitting a hard physical wall, and memory bottlenecks are throttling the entire industry. Founded in October 2024 and backed by €57M in funding, Vertical Compute is solving this with proprietary…

AI Root Cause Analysis Rtl SystemVerilog Uvm

FE RTL Designer / SoC integration

NewBe an early applicant RemoteEurope

About Us : AI compute is hitting a hard physical wall, and memory bottlenecks are throttling the entire industry. Founded in October 2024 and backed by €57M in funding, Vertical Compute is solving this with proprietary…

AI Rtl SystemVerilog Verilog

Front End RTL Designer / SoC integration

NewBe an early applicant RemoteEurope

Front-End RTL Designer at Vertical Compute leads top-level SoC and chiplet integration for 3D-integrated AI accelerator chiplets, integrating internal and third-party IPs to build high-performance AI accelerators that demonstrate the full potential of proprietary Vertical Integrated Memory technology.

AI Rtl SystemVerilog Verilog

FPGA Design Engineer, Senior

NewBe an early applicant RemoteNorth AmericaSenior

Canada

About Positron AI Positron AI is building next-generation AI inference accelerators designed from the ground up for low-latency, high-throughput large language model inference. Our first-generation ASIC, Asimov, is a…

AI Asic Firmware FPGA LLM +5 skills

Entry level Hardware Developer - Austin, TX - 2027

NewBe an early applicant HybridNorth AmericaJunior

United States

At IBM, work is more than a job - it's a calling: To build. To design. To code. To consult. To think along with clients and sell. To make markets. To invent. To collaborate. Not just to do something better, but to…

Agile Asic C++ PCIe Perl +4 skills

DFT Engineer

NewBe an early applicant APACLead

India

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…

AI Ethernet PCIe Rtl SystemVerilog +1 skills

DFT Engineer

NewBe an early applicant MENA

Israel

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the…

AI Automation Backbone.js Bash Ethernet +6 skills

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Job listings

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

Principal Technical Program Manager – DSP/Mixed-Signal ASIC Development – TeraWa

Senior FPGA & Firmware Engineer - SDR

Senior FPGA & Firmware Engineer - SDR

Senior Logic Design Engineer

Principal FPGA Emulation Engineer

Junior ASIC Backend Engineer

RTL Verification Engineer

FE RTL Designer / SoC integration

Front End RTL Designer / SoC integration

FPGA Design Engineer, Senior

Entry level Hardware Developer - Austin, TX - 2027

DFT Engineer

DFT Engineer