SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
Designs and brings up custom RF silicon for Starlink satellites, ground gateways, and user terminals by writing low-level C/C++/Python driver libraries, building hardware test platforms, and validating silicon software on physical hardware or FPGA emulators.
Sr. RF Silicon Software Engineer at SpaceX bringing up custom RF silicon for Starlink satellites and user terminals, writing low-level C/C++/Python drivers, building hardware-in-the-loop test platforms, and integrating with flight software teams.
Chip Software Engineer – Remote Bright Vision Technologies is a technology consulting and software development company delivering cloud, AI, data, and enterprise solutions across the United States. This is a fantastic…
We are seeking a seasoned Backend Design Expert specializing in Static Timing Analysis (STA) and Logic Synthesis . You will own the RTL-to-Gate conversion, constraint development, and final timing closure, ensuring our…
Join Axon and be a Force for Good. At Axon, we’re on a mission to Protect Life. We’re explorers, pursuing society’s most critical safety and justice issues with our ecosystem of devices and cloud software. Like our…
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML…
Embedded Semiconductor Engineer - Remote Bright Vision Technologies is a forward-thinking software development company dedicated to building innovative solutions that help businesses automate and optimize their…
Senior FPGA Engineer designing low-latency signal processing and real-time control systems for quantum processors using SystemVerilog on AMD Xilinx Ultrascale+ platforms, with embedded software and Linux driver development.
Senior Principal STA Physical Design Engineer at Astera Labs driving RTL-to-GDS design of connectivity ASICs for AI infrastructure, ensuring signoff across synthesis, place-and-route, STA, and formal verification using Cadence/Synopsys toolchains.
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